1. Field
Exemplary embodiments of the present invention relate generally to a complementary metal oxide semiconductor (CMOS) image sensor and, more particularly, a ramp signal generator for providing a constant output voltage (or ramp signal) in case of a full code and a CMOS image sensor (CIS) using the same.
In the following descriptions, a current digital-analog converter (IDAC) is described as an example of the ramp signal generator. However, the present invention is not limited thereto.
2. Description of the Related Art
In general, a Correlated Double Sampling (CDS) operation of a CIS has a characteristic significantly variable according to a common-mode voltage, and such a characteristic variation may serve as a factor of degrading the image quality of the CIS.
For example, a comparator with a single-end, AC-coupled input for a small-area CIS determines the common-mode voltage of the CDS operation according to an output voltage (or ramp signal) of a current digital-analog converter (IDAC) which is a ramp signal generator.
Thus, in the case of employing an IDAC for generating a ramp signal using a reference current change, when a ramp signal is changed according to the reference current based on a gain, a common-mode voltage of a CDS operation (that is, voltage in case of a full code) may be changed. As a result, the image quality of the CIS may be degraded.